On 11/18/19 5:26 PM, Peter Maydell wrote:
> On Thu, 17 Oct 2019 at 05:42, Richard Henderson
> wrote:
>>
>> The first patch has been seen before.
>>
>> https://patchwork.ozlabs.org/patch/1115039/
>>
>> It had a bug and I didn't fix it right away and then forgot.
>> Fixed now; I had mixed up the o
On Thu, 17 Oct 2019 at 05:42, Richard Henderson
wrote:
>
> The first patch has been seen before.
>
> https://patchwork.ozlabs.org/patch/1115039/
>
> It had a bug and I didn't fix it right away and then forgot.
> Fixed now; I had mixed up the operand ordering for aarch32.
Since Alex had a nit on
Richard Henderson writes:
> The first patch has been seen before.
>
> https://patchwork.ozlabs.org/patch/1115039/
>
> It had a bug and I didn't fix it right away and then forgot.
> Fixed now; I had mixed up the operand ordering for aarch32.
>
> The next 3 are something that I noticed while do
Patchew URL:
https://patchew.org/QEMU/20191017044232.27601-1-richard.hender...@linaro.org/
Hi,
This series seems to have some coding style problems. See output below for
more information:
Subject: [PATCH 0/4] target/arm vector improvements
Type: series
Message-id: 20191017044232.27601-1
The first patch has been seen before.
https://patchwork.ozlabs.org/patch/1115039/
It had a bug and I didn't fix it right away and then forgot.
Fixed now; I had mixed up the operand ordering for aarch32.
The next 3 are something that I noticed while doing other stuff.
In particular, pmull is u
