Am 12. März 2024 15:47:21 UTC schrieb "Michael S. Tsirkin" :
>On Sun, Feb 18, 2024 at 02:16:56PM +0100, Bernhard Beschow wrote:
>> This series attempts to make QEMU's south bridge families PIIX, ICH9, and VIA
>> 82xx more self-contained by integrating IO port 92 like the originals do.
>
>Bernhar
On Sun, Feb 18, 2024 at 02:16:56PM +0100, Bernhard Beschow wrote:
> This series attempts to make QEMU's south bridge families PIIX, ICH9, and VIA
> 82xx more self-contained by integrating IO port 92 like the originals do.
Bernhard my understanding is that you agreed with Mark this
needs more work.
Am 18. Februar 2024 16:12:30 UTC schrieb BALATON Zoltan :
>On Sun, 18 Feb 2024, Bernhard Beschow wrote:
>> This series attempts to make QEMU's south bridge families PIIX, ICH9, and VIA
>> 82xx more self-contained by integrating IO port 92 like the originals do.
>>
>> In QEMU, the IO port is cur
On Sun, 18 Feb 2024, Bernhard Beschow wrote:
This series attempts to make QEMU's south bridge families PIIX, ICH9, and VIA
82xx more self-contained by integrating IO port 92 like the originals do.
In QEMU, the IO port is currently instantiated as a dedicated device in common
PC code. While this
This series attempts to make QEMU's south bridge families PIIX, ICH9, and VIA
82xx more self-contained by integrating IO port 92 like the originals do.
In QEMU, the IO port is currently instantiated as a dedicated device in common
PC code. While this works and even results in less code, it seems c
