On Fri, Jul 14, 2023 at 4:57 AM Stefan Berger wrote:
>
>
>
> On 7/14/23 06:05, Peter Maydell wrote:
> > On Thu, 13 Jul 2023 at 19:43, Stefan Berger wrote:
> >>
> >>
> >>
> >> On 7/13/23 13:18, Peter Maydell wrote:
> >>> On Thu, 13 Jul 2023 at 18:16, Stefan Berger wrote:
> I guess the first
On 7/14/23 06:05, Peter Maydell wrote:
On Thu, 13 Jul 2023 at 19:43, Stefan Berger wrote:
On 7/13/23 13:18, Peter Maydell wrote:
On Thu, 13 Jul 2023 at 18:16, Stefan Berger wrote:
I guess the first point would be to decide whether to support an i2c bus on the
virt board and then wheth
On Thu, 13 Jul 2023 at 19:43, Stefan Berger wrote:
>
>
>
> On 7/13/23 13:18, Peter Maydell wrote:
> > On Thu, 13 Jul 2023 at 18:16, Stefan Berger wrote:
> >> I guess the first point would be to decide whether to support an i2c bus
> >> on the virt board and then whether we can use the aspeed bus
On 7/13/23 13:18, Peter Maydell wrote:
On Thu, 13 Jul 2023 at 18:16, Stefan Berger wrote:
I guess the first point would be to decide whether to support an i2c bus on the
virt board and then whether we can use the aspeed bus that we know that the
tpm_tis_i2c device model works with but we d
On Thu, 13 Jul 2023 at 18:16, Stefan Berger wrote:
> I guess the first point would be to decide whether to support an i2c bus on
> the virt board and then whether we can use the aspeed bus that we know that
> the tpm_tis_i2c device model works with but we don't know how Windows may
> react to i
On 7/13/23 13:07, Peter Maydell wrote:
On Thu, 13 Jul 2023 at 17:54, Stefan Berger wrote:
On 7/13/23 11:55, Peter Maydell wrote:
On Thu, 13 Jul 2023 at 16:46, Stefan Berger wrote:
On 7/13/23 11:34, Peter Maydell wrote:
On Thu, 13 Jul 2023 at 16:28, Stefan Berger wrote:
On 7/13/23 10
On Thu, 13 Jul 2023 at 17:54, Stefan Berger wrote:
>
>
>
> On 7/13/23 11:55, Peter Maydell wrote:
> > On Thu, 13 Jul 2023 at 16:46, Stefan Berger wrote:
> >> On 7/13/23 11:34, Peter Maydell wrote:
> >>> On Thu, 13 Jul 2023 at 16:28, Stefan Berger wrote:
> On 7/13/23 10:50, Peter Maydell wro
On 7/13/23 11:55, Peter Maydell wrote:
On Thu, 13 Jul 2023 at 16:46, Stefan Berger wrote:
On 7/13/23 11:34, Peter Maydell wrote:
On Thu, 13 Jul 2023 at 16:28, Stefan Berger wrote:
On 7/13/23 10:50, Peter Maydell wrote:
I'm not a super-fan of hacking around the fact that LDP
to hardware r
On Thu, 13 Jul 2023 at 16:46, Stefan Berger wrote:
> On 7/13/23 11:34, Peter Maydell wrote:
> > On Thu, 13 Jul 2023 at 16:28, Stefan Berger wrote:
> >> On 7/13/23 10:50, Peter Maydell wrote:
> >>> I'm not a super-fan of hacking around the fact that LDP
> >>> to hardware registers isn't supported
On 7/13/23 11:34, Peter Maydell wrote:
On Thu, 13 Jul 2023 at 16:28, Stefan Berger wrote:
On 7/13/23 10:50, Peter Maydell wrote:
On Thu, 13 Jul 2023 at 15:18, Stefan Berger wrote:
On 7/12/23 23:51, Joelle van Dyne wrote:
On Apple Silicon, when Windows performs a LDP on the CRB MMIO
On Thu, 13 Jul 2023 at 16:28, Stefan Berger wrote:
>
>
>
> On 7/13/23 10:50, Peter Maydell wrote:
> > On Thu, 13 Jul 2023 at 15:18, Stefan Berger wrote:
> >>
> >>
> >>
> >> On 7/12/23 23:51, Joelle van Dyne wrote:
> >>> On Apple Silicon, when Windows performs a LDP on the CRB MMIO space,
> >>> th
On 7/13/23 10:50, Peter Maydell wrote:
On Thu, 13 Jul 2023 at 15:18, Stefan Berger wrote:
On 7/12/23 23:51, Joelle van Dyne wrote:
On Apple Silicon, when Windows performs a LDP on the CRB MMIO space,
the exception is not decoded by hardware and we cannot trap the MMIO
read. This led to t
On Thu, 13 Jul 2023 at 15:18, Stefan Berger wrote:
>
>
>
> On 7/12/23 23:51, Joelle van Dyne wrote:
> > On Apple Silicon, when Windows performs a LDP on the CRB MMIO space,
> > the exception is not decoded by hardware and we cannot trap the MMIO
> > read. This led to the idea from @agraf to use th
On 7/12/23 23:51, Joelle van Dyne wrote:
On Apple Silicon, when Windows performs a LDP on the CRB MMIO space,
the exception is not decoded by hardware and we cannot trap the MMIO
read. This led to the idea from @agraf to use the same mapping type as
ROM devices: namely that reads should be see
On Apple Silicon, when Windows performs a LDP on the CRB MMIO space,
the exception is not decoded by hardware and we cannot trap the MMIO
read. This led to the idea from @agraf to use the same mapping type as
ROM devices: namely that reads should be seen as memory type and
writes should trap as MMI
15 matches
Mail list logo