Re: [PATCH 1/1] target/arm: calculate cache sizes properly

2024-07-11 Thread Marcin Juszkiewicz
On 11.07.2024 12:19, Peter Maydell wrote: On Wed, 10 Jul 2024 at 18:35, Marcin Juszkiewicz wrote: Neoverse-V1 TRM says that NumSets are [27:13] not :32 like in code. NumSets in fields [27:13] is the 32-bit CCSIDR_EL1 format (i.e. what you have when FEAT_CCIDX is not implemented). The make_cc

Re: [PATCH 1/1] target/arm: calculate cache sizes properly

2024-07-11 Thread Peter Maydell
On Wed, 10 Jul 2024 at 18:35, Marcin Juszkiewicz wrote: > > Neoverse-V1 TRM says that NumSets are [27:13] not :32 like in code. NumSets in fields [27:13] is the 32-bit CCSIDR_EL1 format (i.e. what you have when FEAT_CCIDX is not implemented). The make_ccsidr64() function provides the 64-bit CCSID

[PATCH 1/1] target/arm: calculate cache sizes properly

2024-07-10 Thread Marcin Juszkiewicz
Neoverse-V1 TRM says that NumSets are [27:13] not :32 like in code. With this fix all cores which use make_ccsidr64() function have proper size of cpu caches. Signed-off-by: Marcin Juszkiewicz --- target/arm/tcg/cpu64.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/target/