On 1/15/24 13:25, Rob Bradford wrote:
These extensions represent the atomic operations from A (Zaamo) and the
Load-Reserved/Store-Conditional operations from A (Zalrsc)
Signed-off-by: Rob Bradford
---
Reviewed-by: Daniel Henrique Barboza
target/riscv/cpu.c | 5 +
target/riscv
These extensions represent the atomic operations from A (Zaamo) and the
Load-Reserved/Store-Conditional operations from A (Zalrsc)
Signed-off-by: Rob Bradford
---
target/riscv/cpu.c | 5 +
target/riscv/cpu_cfg.h | 2 ++
2 files changed, 7 insertions(+)
diff --git a/target/riscv/cpu.c b/