Since 636ddeb15c0, we do not require rd == ra.

Signed-off-by: Richard Henderson <richard.hender...@linaro.org>
---
 target/arm/translate-sve.c | 2 --
 1 file changed, 2 deletions(-)

diff --git a/target/arm/translate-sve.c b/target/arm/translate-sve.c
index 886cf539a5..436d09b928 100644
--- a/target/arm/translate-sve.c
+++ b/target/arm/translate-sve.c
@@ -4027,8 +4027,6 @@ static bool trans_FCMLA_zzxz(DisasContext *s, 
arg_FCMLA_zzxz *a)
         NULL,
     };
 
-    tcg_debug_assert(a->rd == a->ra);
-
     return gen_gvec_fpst_zzzz(s, fns[a->esz], a->rd, a->rn, a->rm, a->ra,
                               a->index * 4 + a->rot,
                               a->esz == MO_16 ? FPST_FPCR_F16 : FPST_FPCR);
-- 
2.34.1


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