Hi Peter,
On Fri, Jan 8, 2021 at 10:49 PM Peter Maydell wrote:
>
> On Thu, 17 Dec 2020 at 05:28, Bin Meng wrote:
> >
> > From: Bin Meng
> >
> > The endianness of data exchange between tx and rx fifo is incorrect.
> > Earlier bytes are supposed to show up on MSB and later bytes on LSB,
> > ie: i
On Thu, 17 Dec 2020 at 05:28, Bin Meng wrote:
>
> From: Bin Meng
>
> The endianness of data exchange between tx and rx fifo is incorrect.
> Earlier bytes are supposed to show up on MSB and later bytes on LSB,
> ie: in big endian. The manual does not explicitly say this, but the
> U-Boot and Linux
From: Bin Meng
The endianness of data exchange between tx and rx fifo is incorrect.
Earlier bytes are supposed to show up on MSB and later bytes on LSB,
ie: in big endian. The manual does not explicitly say this, but the
U-Boot and Linux driver codes have a swap on the data transferred
to tx fifo
