subject:"\[PATCH 2\/2\] target\/mips\: Allow Loongson 3A1000 to use up to 48\-bit VAddr"

Re: [PATCH 2/2] target/mips: Allow Loongson 3A1000 to use up to 48-bit VAddr

2021-08-13 Thread Huacai Chen

Reviewed-by: Huacai Chen On Fri, Aug 13, 2021 at 7:02 PM Philippe Mathieu-Daudé wrote: > > Per the manual '龙芯 GS264 处理器核用户手册' v1.0, chapter > 1.1.5 SEGBITS: the 3A1000 (based on GS464 core) implements > 48 virtual address bits in each 64-bit segment, not 40. > > Fixes: af868995e1b ("target/mips:

[PATCH 2/2] target/mips: Allow Loongson 3A1000 to use up to 48-bit VAddr

2021-08-13 Thread Philippe Mathieu-Daudé

Per the manual '龙芯 GS264 处理器核用户手册' v1.0, chapter 1.1.5 SEGBITS: the 3A1000 (based on GS464 core) implements 48 virtual address bits in each 64-bit segment, not 40. Fixes: af868995e1b ("target/mips: Add Loongson-3 CPU definition") Signed-off-by: Philippe Mathieu-Daudé --- target/mips/cpu-defs.c.i