Re: [PATCH 2/2] target/riscv: Implement dump content of vector register

2022-07-09 Thread Weiwei Li
在 2022/7/8 下午4:57, Kito Cheng 写道: Implement -d cpu,vu to dump content of vector register. Signed-off-by: Kito Cheng --- target/riscv/cpu.c | 31 +++ 1 file changed, 31 insertions(+) diff --git a/target/riscv/cpu.c b/target/riscv/cpu.c index

[PATCH 2/2] target/riscv: Implement dump content of vector register

2022-07-08 Thread Kito Cheng
Implement -d cpu,vu to dump content of vector register. Signed-off-by: Kito Cheng --- target/riscv/cpu.c | 31 +++ 1 file changed, 31 insertions(+) diff --git a/target/riscv/cpu.c b/target/riscv/cpu.c index c1b96da7da..97b289d277 100644 --- a/target/riscv/cpu.c +++