On 10/21/21 12:45 PM, matheus.fe...@eldorado.org.br wrote:
+if (ctx->le_mode) {
+gen_addr_add(ctx, ea, ea, 8);
+offset = -8;
+} else {
+offset = 8;
+}
+
+if (store) {
+get_cpu_vsrh(xt, rt);
+tcg_gen_qemu_st_i64(xt, ea, ctx->mem_idx, mop);
+
On 10/23/21 1:34 PM, Richard Henderson wrote:
On 10/21/21 12:45 PM, matheus.fe...@eldorado.org.br wrote:
+static bool do_lstxv(DisasContext *ctx, int ra, int displ,
+ int rt, bool store)
You need an int64_t displ before you add PLXV et al. What happened to passing in arg_D
On 10/21/21 12:45 PM, matheus.fe...@eldorado.org.br wrote:
+static bool do_lstxv(DisasContext *ctx, int ra, int displ,
+ int rt, bool store)
You need an int64_t displ before you add PLXV et al. What happened to passing in arg_D as
for the other integer instructions?
+
From: "Lucas Mateus Castro (alqotel)"
Moved stxv and lxv implementation from the legacy system to
decodetree.
Signed-off-by: Luis Pires
Signed-off-by: Lucas Mateus Castro (alqotel)
Signed-off-by: Matheus Ferst
---
target/ppc/insn32.decode| 8
target/ppc/translate.c
