On 6/16/21 6:53 AM, Jason Thorpe wrote:
Since you’ve already queued up the others...
To be clear, I have not queued patch 1, re the rtc.
I was hoping to get some additional feedback on that,
since it doesn't affect only alpha.
r~
> On Jun 14, 2021, at 9:24 PM, Jason Thorpe wrote:
>> Why can't we just use the existing device model?
>> Certainly duplicating code like this isn't the best way.
>
> Yah, I’m not super happy with that, either, tbh. When I first started
> working on this several months ago, I it looked like
> On Jun 14, 2021, at 9:20 PM, Richard Henderson
> wrote:
>
> On 6/13/21 2:15 PM, Jason Thorpe wrote:
>> +/* The following was copied from hw/isa/i82378.c and modified to provide
>> + only the minimal PCI device node. */
>> +
>> +/*
>> + * QEMU Intel i82378 emulation (PCI to ISA bridge)
>>
On 6/13/21 2:15 PM, Jason Thorpe wrote:
+/* The following was copied from hw/isa/i82378.c and modified to provide
+ only the minimal PCI device node. */
+
+/*
+ * QEMU Intel i82378 emulation (PCI to ISA bridge)
+ *
Why can't we just use the existing device model?
Certainly duplicating code l
Provide a PCI device node at ID 7 for the PCI-ISA bridge. Even though
Tsunami/Typhoon systems would have used a different chip (Cypress or ALI),
for simplicity we model the Intel i82378, which was also used on several
Alpha models. This is needed for some operating systems that only probe
ISA dev
