On Fri, May 15, 2020 at 11:39 PM Anup Patel wrote:
>
> We extend PLIC emulation to allow multiple instances of PLIC in
> a QEMU RISC-V machine. To achieve this, we remove first HART id
> zero assumption from PLIC emulation.
>
> Signed-off-by: Anup Patel
Reviewed-by: Alistair Francis
Alistair
On Fri, 15 May 2020 23:37:45 PDT (-0700), Anup Patel wrote:
We extend PLIC emulation to allow multiple instances of PLIC in
a QEMU RISC-V machine. To achieve this, we remove first HART id
zero assumption from PLIC emulation.
Signed-off-by: Anup Patel
---
hw/riscv/sifive_e.c| 2 +-
We extend PLIC emulation to allow multiple instances of PLIC in
a QEMU RISC-V machine. To achieve this, we remove first HART id
zero assumption from PLIC emulation.
Signed-off-by: Anup Patel
---
hw/riscv/sifive_e.c| 2 +-
hw/riscv/sifive_plic.c | 24 +---