On Sun, 29 Jan 2023 14:55:06 +
Bernhard Beschow wrote:
> Am 25. Januar 2023 15:55:01 UTC schrieb Igor Mammedov :
> >On Sun, 22 Jan 2023 18:07:22 +0100
> >Bernhard Beschow wrote:
> >
> >> The PIIX4 datasheet defines the GPSTS register to be at offset 0x0c of the
> >> power management I/O re
Am 25. Januar 2023 15:55:01 UTC schrieb Igor Mammedov :
>On Sun, 22 Jan 2023 18:07:22 +0100
>Bernhard Beschow wrote:
>
>> The PIIX4 datasheet defines the GPSTS register to be at offset 0x0c of the
>> power management I/O register block. This register block is represented
>> in the device model
On Sun, 22 Jan 2023 18:07:22 +0100
Bernhard Beschow wrote:
> The PIIX4 datasheet defines the GPSTS register to be at offset 0x0c of the
> power management I/O register block. This register block is represented
> in the device model by the io attribute. So make io_gpe a child memory
> region of io
The PIIX4 datasheet defines the GPSTS register to be at offset 0x0c of the
power management I/O register block. This register block is represented
in the device model by the io attribute. So make io_gpe a child memory
region of io at offset 0x0c.
Note that SeaBIOS sets the base address of the regi
