The instructions have the same function as RVV1.0. Overall there are only
general differences between XTheadVector and RVV1.0.
Signed-off-by: Huang Tao <eric.hu...@linux.alibaba.com>
---
target/riscv/helper.h | 10 ++++
.../riscv/insn_trans/trans_xtheadvector.c.inc | 8 +--
target/riscv/xtheadvector_helper.c | 49 +++++++++++++++++++
3 files changed, 64 insertions(+), 3 deletions(-)
diff --git a/target/riscv/helper.h b/target/riscv/helper.h
index 2cd4a7401f..24bb8479a4 100644
--- a/target/riscv/helper.h
+++ b/target/riscv/helper.h
@@ -2276,3 +2276,13 @@ DEF_HELPER_6(th_vwredsumu_vs_w, void, ptr, ptr, ptr,
ptr, env, i32)
DEF_HELPER_6(th_vwredsum_vs_b, void, ptr, ptr, ptr, ptr, env, i32)
DEF_HELPER_6(th_vwredsum_vs_h, void, ptr, ptr, ptr, ptr, env, i32)
DEF_HELPER_6(th_vwredsum_vs_w, void, ptr, ptr, ptr, ptr, env, i32)
+
+DEF_HELPER_6(th_vfredsum_vs_h, void, ptr, ptr, ptr, ptr, env, i32)
+DEF_HELPER_6(th_vfredsum_vs_w, void, ptr, ptr, ptr, ptr, env, i32)
+DEF_HELPER_6(th_vfredsum_vs_d, void, ptr, ptr, ptr, ptr, env, i32)
+DEF_HELPER_6(th_vfredmax_vs_h, void, ptr, ptr, ptr, ptr, env, i32)
+DEF_HELPER_6(th_vfredmax_vs_w, void, ptr, ptr, ptr, ptr, env, i32)
+DEF_HELPER_6(th_vfredmax_vs_d, void, ptr, ptr, ptr, ptr, env, i32)
+DEF_HELPER_6(th_vfredmin_vs_h, void, ptr, ptr, ptr, ptr, env, i32)
+DEF_HELPER_6(th_vfredmin_vs_w, void, ptr, ptr, ptr, ptr, env, i32)
+DEF_HELPER_6(th_vfredmin_vs_d, void, ptr, ptr, ptr, ptr, env, i32)
diff --git a/target/riscv/insn_trans/trans_xtheadvector.c.inc
b/target/riscv/insn_trans/trans_xtheadvector.c.inc
index 8a1f0e1e74..f77d76dc5e 100644
--- a/target/riscv/insn_trans/trans_xtheadvector.c.inc
+++ b/target/riscv/insn_trans/trans_xtheadvector.c.inc
@@ -2397,15 +2397,17 @@ GEN_OPIVV_TRANS_TH(th_vredxor_vs, reduction_check_th)
GEN_OPIVV_WIDEN_TRANS_TH(th_vwredsum_vs, reduction_check_th)
GEN_OPIVV_WIDEN_TRANS_TH(th_vwredsumu_vs, reduction_check_th)
+/* Vector Single-Width Floating-Point Reduction Instructions */
+GEN_OPFVV_TRANS_TH(th_vfredsum_vs, reduction_check_th)
+GEN_OPFVV_TRANS_TH(th_vfredmax_vs, reduction_check_th)
+GEN_OPFVV_TRANS_TH(th_vfredmin_vs, reduction_check_th)
+
#define TH_TRANS_STUB(NAME) \
static bool trans_##NAME(DisasContext *s, arg_##NAME *a) \
{ \
return require_xtheadvector(s); \
}
-TH_TRANS_STUB(th_vfredsum_vs)
-TH_TRANS_STUB(th_vfredmin_vs)
-TH_TRANS_STUB(th_vfredmax_vs)
TH_TRANS_STUB(th_vfwredsum_vs)
TH_TRANS_STUB(th_vmand_mm)
TH_TRANS_STUB(th_vmnand_mm)
diff --git a/target/riscv/xtheadvector_helper.c
b/target/riscv/xtheadvector_helper.c
index f802b2c5ac..2a241aed65 100644
--- a/target/riscv/xtheadvector_helper.c
+++ b/target/riscv/xtheadvector_helper.c
@@ -3410,3 +3410,52 @@ GEN_TH_RED(th_vwredsum_vs_w, int64_t, int32_t, H8, H4,
TH_ADD, clearq_th)
GEN_TH_RED(th_vwredsumu_vs_b, uint16_t, uint8_t, H2, H1, TH_ADD, clearh_th)
GEN_TH_RED(th_vwredsumu_vs_h, uint32_t, uint16_t, H4, H2, TH_ADD, clearl_th)
GEN_TH_RED(th_vwredsumu_vs_w, uint64_t, uint32_t, H8, H4, TH_ADD, clearq_th)
+
+/* Vector Single-Width Floating-Point Reduction Instructions */
+#define GEN_TH_FRED(NAME, TD, TS2, HD, HS2, OP, CLEAR_FN) \
+void HELPER(NAME)(void *vd, void *v0, void *vs1, \
+ void *vs2, CPURISCVState *env, \
+ uint32_t desc) \
+{ \
+ uint32_t mlen = th_mlen(desc); \
+ uint32_t vm = th_vm(desc); \
+ uint32_t vl = env->vl; \
+ uint32_t i; \
+ uint32_t tot = env_archcpu(env)->cfg.vlenb; \
+ TD s1 = *((TD *)vs1 + HD(0)); \
+ \
+ for (i = env->vstart; i < vl; i++) { \
+ TS2 s2 = *((TS2 *)vs2 + HS2(i)); \
+ if (!vm && !th_elem_mask(v0, mlen, i)) { \
+ continue; \
+ } \
+ s1 = OP(s1, (TD)s2, &env->fp_status); \
+ } \
+ *((TD *)vd + HD(0)) = s1; \
+ env->vstart = 0; \
+ CLEAR_FN(vd, 1, sizeof(TD), tot); \
+}
+
+/* Unordered sum */
+GEN_TH_FRED(th_vfredsum_vs_h, uint16_t, uint16_t, H2, H2,
+ float16_add, clearh_th)
+GEN_TH_FRED(th_vfredsum_vs_w, uint32_t, uint32_t, H4, H4,
+ float32_add, clearl_th)
+GEN_TH_FRED(th_vfredsum_vs_d, uint64_t, uint64_t, H8, H8,
+ float64_add, clearq_th)
+
+/* Maximum value */
+GEN_TH_FRED(th_vfredmax_vs_h, uint16_t, uint16_t, H2, H2,
+ float16_maxnum, clearh_th)
+GEN_TH_FRED(th_vfredmax_vs_w, uint32_t, uint32_t, H4, H4,
+ float32_maxnum, clearl_th)
+GEN_TH_FRED(th_vfredmax_vs_d, uint64_t, uint64_t, H8, H8,
+ float64_maxnum, clearq_th)
+
+/* Minimum value */
+GEN_TH_FRED(th_vfredmin_vs_h, uint16_t, uint16_t, H2, H2,
+ float16_minnum, clearh_th)
+GEN_TH_FRED(th_vfredmin_vs_w, uint32_t, uint32_t, H4, H4,
+ float32_minnum, clearl_th)
+GEN_TH_FRED(th_vfredmin_vs_d, uint64_t, uint64_t, H8, H8,
+ float64_minnum, clearq_th)
--
2.44.0
