Re: [PATCH 6/8] target/sparc: Fix VIS fpmerge input registers.

2023-09-28 Thread Nick Bowler
On 2023-09-28, Richard Henderson wrote: > On 9/24/23 01:03, Nick Bowler wrote: >> case 0x04b: /* VIS I fpmerge */ >> CHECK_FPU_FEATURE(dc, VIS1); >> -gen_ne_fop_DDD(dc, rd, rs1, rs2, >> gen_helper_fpmerge); >> +cpu_src

Re: [PATCH 6/8] target/sparc: Fix VIS fpmerge input registers.

2023-09-28 Thread Richard Henderson
On 9/24/23 01:03, Nick Bowler wrote: case 0x04b: /* VIS I fpmerge */ CHECK_FPU_FEATURE(dc, VIS1); -gen_ne_fop_DDD(dc, rd, rs1, rs2, gen_helper_fpmerge); +cpu_src1_32 = gen_load_fpr_F(dc, rs1); +cpu

[PATCH 6/8] target/sparc: Fix VIS fpmerge input registers.

2023-09-25 Thread Nick Bowler
On a real UltraSparc II CPU, the fpmerge instruction reads two single-precision input registers, but the emulator is reading from double-precision input registers instead. These are unlikely to contain the correct data so in most instances the results of the emulation are just garbage in most inst