On 12/09/20 13:33, Philippe Mathieu-Daudé wrote:
>> I'll send a new patch for the PCI-single device:
> Bah this can simply be squashed into the previous patch.
>
Yup, done.
Paolo
On 9/12/20 1:28 PM, Philippe Mathieu-Daudé wrote:
> On 9/12/20 11:14 AM, Paolo Bonzini wrote:
>> On 07/09/20 03:55, Philippe Mathieu-Daudé wrote:
>>> When a SoC has multiple UARTs (some configured differently),
>>> it is hard to associate events to their UART.
>>>
>>> To be able to distinct trace e
On 9/12/20 11:14 AM, Paolo Bonzini wrote:
> On 07/09/20 03:55, Philippe Mathieu-Daudé wrote:
>> When a SoC has multiple UARTs (some configured differently),
>> it is hard to associate events to their UART.
>>
>> To be able to distinct trace events between various instances,
>> add an 'id' field. Up
On 07/09/20 03:55, Philippe Mathieu-Daudé wrote:
> When a SoC has multiple UARTs (some configured differently),
> it is hard to associate events to their UART.
>
> To be able to distinct trace events between various instances,
> add an 'id' field. Update the trace format accordingly.
>
> Reviewed
When a SoC has multiple UARTs (some configured differently),
it is hard to associate events to their UART.
To be able to distinct trace events between various instances,
add an 'id' field. Update the trace format accordingly.
Reviewed-by: Richard Henderson
Signed-off-by: Philippe Mathieu-Daudé
