Re: [PATCH qemu v6 00/10] Add mask agnostic behavior for rvv instructions

2022-07-20 Thread Alistair Francis
On Mon, Jun 20, 2022 at 4:56 PM ~eopxd wrote: > > According to v-spec, mask agnostic behavior can be either kept as > undisturbed or set elements' bits to all 1s. To distinguish the > difference of mask policies, QEMU should be able to simulate the mask > agnostic behavior as "set mask elements' b

Re: [PATCH qemu v6 00/10] Add mask agnostic behavior for rvv instructions

2022-07-11 Thread eop Chen
Gentle ping. Regards, eop Chen > ~eopxd 於 2022年6月20日 下午2:50 寫道: > > According to v-spec, mask agnostic behavior can be either kept as > undisturbed or set elements' bits to all 1s. To distinguish the > difference of mask policies, QEMU should be able to simulate the mask > agnostic behavior as

[PATCH qemu v6 00/10] Add mask agnostic behavior for rvv instructions

2022-06-19 Thread ~eopxd
According to v-spec, mask agnostic behavior can be either kept as undisturbed or set elements' bits to all 1s. To distinguish the difference of mask policies, QEMU should be able to simulate the mask agnostic behavior as "set mask elements' bits to all 1s". There are multiple possibility for agnos