Hi Peter,
On 2023-08-03 15:48, Peter Maydell wrote:
On Mon, 10 Jul 2023 at 15:03, Francisco Iglesias
wrote:
Introduce a model of Xilinx Versal's Configuration Frame Unit's data out
port (CFU_FDRO).
Signed-off-by: Francisco Iglesias
---
hw/misc/xlnx-versal-cfu.c | 105 +
On Mon, 10 Jul 2023 at 15:03, Francisco Iglesias
wrote:
>
> Introduce a model of Xilinx Versal's Configuration Frame Unit's data out
> port (CFU_FDRO).
>
> Signed-off-by: Francisco Iglesias
> ---
> hw/misc/xlnx-versal-cfu.c | 105 ++
> include/hw/misc/xlnx-ver
Introduce a model of Xilinx Versal's Configuration Frame Unit's data out
port (CFU_FDRO).
Signed-off-by: Francisco Iglesias
---
hw/misc/xlnx-versal-cfu.c | 105 ++
include/hw/misc/xlnx-versal-cfu.h | 11
2 files changed, 116 insertions(+)
diff --git a/h
