On Mon, Oct 11, 2021 at 12:31:17PM +0200, BALATON Zoltan wrote:
> On Mon, 11 Oct 2021, Gerd Hoffmann wrote:
> > On Tue, Oct 05, 2021 at 03:12:05PM +0200, BALATON Zoltan wrote:
> > > This device is part of a superio/ISA bridge chip and IRQs from it are
> > > routed to an ISA interrupt set by the Int
On Mon, 11 Oct 2021, Gerd Hoffmann wrote:
On Tue, Oct 05, 2021 at 03:12:05PM +0200, BALATON Zoltan wrote:
This device is part of a superio/ISA bridge chip and IRQs from it are
routed to an ISA interrupt set by the Interrupt Line PCI config
register. Change uhci_update_irq() to allow this and use
On Tue, Oct 05, 2021 at 03:12:05PM +0200, BALATON Zoltan wrote:
> This device is part of a superio/ISA bridge chip and IRQs from it are
> routed to an ISA interrupt set by the Interrupt Line PCI config
> register. Change uhci_update_irq() to allow this and use it from
> vt82c686-uhci-pci.
Hmm, sho
This device is part of a superio/ISA bridge chip and IRQs from it are
routed to an ISA interrupt set by the Interrupt Line PCI config
register. Change uhci_update_irq() to allow this and use it from
vt82c686-uhci-pci.
Signed-off-by: BALATON Zoltan
Reviewed-by: Jiaxun Yang
---
v2: Do it different
