Re: [PATCH v2] target/riscv: Prevent lost illegal instruction exceptions

On 3/22/21 6:16 AM, Georg Kotheimer wrote: When decode_insn16() fails, we fall back to decode_RV32_64C() for further compressed instruction decoding. However, prior to this change, we did not raise an illegal instruction exception, if decode_RV32_64C() fails to decode the instruction. This means

Re: [PATCH v2] target/riscv: Prevent lost illegal instruction exceptions

On Mon, Mar 22, 2021 at 8:27 AM Georg Kotheimer wrote: > > When decode_insn16() fails, we fall back to decode_RV32_64C() for > further compressed instruction decoding. However, prior to this change, > we did not raise an illegal instruction exception, if decode_RV32_64C() > fails to decode the ins

[PATCH v2] target/riscv: Prevent lost illegal instruction exceptions

When decode_insn16() fails, we fall back to decode_RV32_64C() for further compressed instruction decoding. However, prior to this change, we did not raise an illegal instruction exception, if decode_RV32_64C() fails to decode the instruction. This means that we skipped illegal compressed instructio