Re: [PATCH v2 00/10] hw/riscv: microchip_pfsoc: Support factory HSS boot out of the box

On Tue, Oct 27, 2020 at 10:31 PM Bin Meng wrote: > > From: Bin Meng > > At present the DDR memory controller is not modeled, hence the factory > HSS firmware does not boot out of the box on QEMU. A modified HSS is > required per the instructions on [1]. > > This series adds the missing DDR memory

[PATCH v2 00/10] hw/riscv: microchip_pfsoc: Support factory HSS boot out of the box

From: Bin Meng At present the DDR memory controller is not modeled, hence the factory HSS firmware does not boot out of the box on QEMU. A modified HSS is required per the instructions on [1]. This series adds the missing DDR memory controller support to PolarFire SoC, as well as adding various