Re: [PATCH v2 1/4] hw/i2c/aspeed: Fix I2CD_POOL_CTRL register bit field defination

2023-08-11 Thread Cédric Le Goater
Hello Hang, It is good practice to send a cover letter giving a quick summary of the changes. On 8/11/23 07:42, Hang Yu wrote: Fixed inconsistency between the regisiter bit field defination in headfile Fixed inconsistency between the register bit field definition header file and the ast2600

[PATCH v2 1/4] hw/i2c/aspeed: Fix I2CD_POOL_CTRL register bit field defination

2023-08-10 Thread Hang Yu
Fixed inconsistency between the regisiter bit field defination in headfile and the ast2600 datasheet. The reg name is I2CD1C:Pool Buffer Control Register in old register mode and I2CC0C: Master/Slave Pool Buffer Control Register in new register mode. They share bit field [12:8]:Transmit Data Byte