Re: [PATCH v2 1/8] target/riscv: Fix csr number based privilege checking

On Wed, May 11, 2022 at 7:46 AM Anup Patel wrote: > > When hypervisor and VS CSRs are accessed from VS-mode or VU-mode, > the riscv_csrrw_check() function should generate virtual instruction > trap instead illegal instruction trap. > > Fixes: 0a42f4c44088 (" target/riscv: Fix CSR perm checking for

[PATCH v2 1/8] target/riscv: Fix csr number based privilege checking

When hypervisor and VS CSRs are accessed from VS-mode or VU-mode, the riscv_csrrw_check() function should generate virtual instruction trap instead illegal instruction trap. Fixes: 0a42f4c44088 (" target/riscv: Fix CSR perm checking for HS mode") Signed-off-by: Anup Patel Reviewed-by: Alistair Fr