On Thu, Oct 12, 2023 at 6:53 PM LIU Zhiwei wrote:
>
>
> On 2023/10/11 22:45, Rob Bradford wrote:
> > Add 32-bit version of mask generating macro and use it in the RISC-V PMU
> > code.
> CC Richard
> > Signed-off-by: Rob Bradford
> > ---
> > include/qemu/bitops.h | 3 +++
> > target/riscv/pmu.c
On 2023/10/11 22:45, Rob Bradford wrote:
Add 32-bit version of mask generating macro and use it in the RISC-V PMU
code.
CC Richard
Signed-off-by: Rob Bradford
---
include/qemu/bitops.h | 3 +++
target/riscv/pmu.c| 2 --
2 files changed, 3 insertions(+), 2 deletions(-)
diff --git a/i
Add 32-bit version of mask generating macro and use it in the RISC-V PMU
code.
Signed-off-by: Rob Bradford
---
include/qemu/bitops.h | 3 +++
target/riscv/pmu.c| 2 --
2 files changed, 3 insertions(+), 2 deletions(-)
diff --git a/include/qemu/bitops.h b/include/qemu/bitops.h
index cb3526d1f
