Richard Henderson writes:
> On 11/6/20 12:31 PM, Alex Bennée wrote:
>>> +/* Flush the dcache at RW, and the icache at RX, as necessary. */
>>> +static inline void flush_idcache_range(uintptr_t rx, uintptr_t rw, size_t
>>> len)
>>> {
>>> -__builtin___clear_cache((char *)start, (char
On 11/6/20 12:31 PM, Alex Bennée wrote:
>> +/* Flush the dcache at RW, and the icache at RX, as necessary. */
>> +static inline void flush_idcache_range(uintptr_t rx, uintptr_t rw, size_t
>> len)
>> {
>> -__builtin___clear_cache((char *)start, (char *)stop);
>> +/* TODO: Copy this from
Richard Henderson writes:
> We are shortly going to have a split rw/rx jit buffer. Depending
> on the host, we need to flush the dcache at the rw data pointer and
> flush the icache at the rx code pointer.
>
> For now, the two passed pointers are identical, so there is no
> effective change
We are shortly going to have a split rw/rx jit buffer. Depending
on the host, we need to flush the dcache at the rw data pointer and
flush the icache at the rx code pointer.
For now, the two passed pointers are identical, so there is no
effective change in behaviour.
Signed-off-by: Richard
