Re: [PATCH v3 09/14] RISC-V: Adding T-Head MemIdx extension

2023-01-31 Thread Christoph Müllner
On Tue, Jan 24, 2023 at 10:21 PM Richard Henderson wrote: > > On 1/24/23 09:59, Christoph Muellner wrote: > > +/* XTheadMemIdx */ > > + > > +/* > > + * Load with memop from indexed address and add (imm5 << imm2) to rs1. > > + * If !preinc, then the load address is rs1. > > + * If preinc, then the

Re: [PATCH v3 09/14] RISC-V: Adding T-Head MemIdx extension

2023-01-30 Thread LIU Zhiwei
On 2023/1/25 5:21, Richard Henderson wrote: On 1/24/23 09:59, Christoph Muellner wrote: +/* XTheadMemIdx */ + +/* + * Load with memop from indexed address and add (imm5 << imm2) to rs1. + * If !preinc, then the load address is rs1. + * If  preinc, then the load address is rs1 + (imm5) << imm2)

Re: [PATCH v3 09/14] RISC-V: Adding T-Head MemIdx extension

2023-01-24 Thread Richard Henderson
On 1/24/23 09:59, Christoph Muellner wrote: +/* XTheadMemIdx */ + +/* + * Load with memop from indexed address and add (imm5 << imm2) to rs1. + * If !preinc, then the load address is rs1. + * If preinc, then the load address is rs1 + (imm5) << imm2). + */ +static bool gen_load_inc(DisasContext *

[PATCH v3 09/14] RISC-V: Adding T-Head MemIdx extension

2023-01-24 Thread Christoph Muellner
From: Christoph Müllner This patch adds support for the T-Head MemIdx instructions. The patch uses the T-Head specific decoder and translation. Co-developed-by: LIU Zhiwei Reviewed-by: Alistair Francis Signed-off-by: Christoph Müllner --- Changes in v2: - Add ISA_EXT_DATA_ENTRY() - Use single