Re: [PATCH v3 16/16] tcg/loongarch64: Implement 128-bit load & store

2023-09-04 Thread bibo mao
在 2023/9/4 09:43, gaosong 写道: > Hi, yijun > > 在 2023/9/3 上午9:10, Jiajie Chen 写道: >> >> On 2023/9/3 09:06, Richard Henderson wrote: >>> On 9/1/23 22:02, Jiajie Chen wrote: If LSX is available, use LSX instructions to implement 128-bit load & store. >>> >>> Is this really guaranteed to

Re: [PATCH v3 16/16] tcg/loongarch64: Implement 128-bit load & store

2023-09-03 Thread gaosong
Hi, yijun 在 2023/9/3 上午9:10, Jiajie Chen 写道: On 2023/9/3 09:06, Richard Henderson wrote: On 9/1/23 22:02, Jiajie Chen wrote: If LSX is available, use LSX instructions to implement 128-bit load & store. Is this really guaranteed to be an atomic 128-bit operation? Song Gao, please check th

Re: [PATCH v3 16/16] tcg/loongarch64: Implement 128-bit load & store

2023-09-02 Thread Jiajie Chen
On 2023/9/3 09:06, Richard Henderson wrote: On 9/1/23 22:02, Jiajie Chen wrote: If LSX is available, use LSX instructions to implement 128-bit load & store. Is this really guaranteed to be an atomic 128-bit operation? Song Gao, please check this. Or, as for many vector processors, is th

Re: [PATCH v3 16/16] tcg/loongarch64: Implement 128-bit load & store

2023-09-02 Thread Richard Henderson
On 9/1/23 22:02, Jiajie Chen wrote: If LSX is available, use LSX instructions to implement 128-bit load & store. Is this really guaranteed to be an atomic 128-bit operation? Or, as for many vector processors, is this really two separate 64-bit memory operations under the hood? +static voi

[PATCH v3 16/16] tcg/loongarch64: Implement 128-bit load & store

2023-09-01 Thread Jiajie Chen
If LSX is available, use LSX instructions to implement 128-bit load & store. Signed-off-by: Jiajie Chen --- tcg/loongarch64/tcg-target-con-set.h | 2 ++ tcg/loongarch64/tcg-target.c.inc | 42 tcg/loongarch64/tcg-target.h | 2 +- 3 files changed, 45 inse