[PATCH v4] hw/smbios: support for type 41 (onboard devices extended information)

2021-04-01 Thread Vincent Bernat
Type 41 defines the attributes of devices that are onboard. The original intent was to imply the BIOS had some level of control over the enablement of the associated devices. If network devices are present in this table, by default, udev will name the corresponding interfaces enoX, X being the ins

Re: [PATCH v4] hw/smbios: support for type 41 (onboard devices extended information)

2021-04-30 Thread Vincent Bernat
❦ 1 avril 2021 19:11 +02, Vincent Bernat: > Type 41 defines the attributes of devices that are onboard. The > original intent was to imply the BIOS had some level of control over > the enablement of the associated devices. Now that QEMU 6 is released, I think this patch is ready (it still appli

Re: [PATCH v4] hw/smbios: support for type 41 (onboard devices extended information)

2021-05-03 Thread Igor Mammedov
On Thu, 1 Apr 2021 19:11:38 +0200 Vincent Bernat wrote: > Type 41 defines the attributes of devices that are onboard. The > original intent was to imply the BIOS had some level of control over > the enablement of the associated devices. > > If network devices are present in this table, by defau

Re: [PATCH v4] hw/smbios: support for type 41 (onboard devices extended information)

2021-05-03 Thread Vincent Bernat
❦ 3 mai 2021 17:05 +02, Igor Mammedov: >> +/* >> + * We only handle the case were the device is attached to >> + * the PCI root bus. The general case is more complex as >> + * bridges are enumerated later and the table would need >> + *

Re: [PATCH v4] hw/smbios: support for type 41 (onboard devices extended information)

2021-05-03 Thread Michael S. Tsirkin
On Mon, May 03, 2021 at 09:34:42PM +0200, Vincent Bernat wrote: > ❦ 3 mai 2021 17:05 +02, Igor Mammedov: > > >> +/* > >> + * We only handle the case were the device is attached to > >> + * the PCI root bus. The general case is more complex as > >> +

Re: [PATCH v4] hw/smbios: support for type 41 (onboard devices extended information)

2021-05-07 Thread Vincent Bernat
❦ 3 mai 2021 15:42 -04, Michael S. Tsirkin: >> >> +/* >> >> + * We only handle the case were the device is attached to >> >> + * the PCI root bus. The general case is more complex as >> >> + * bridges are enumerated later and the table would need >