On Thu, 11 Aug 2022, Cédric Le Goater wrote:
Don't drop Ppc4xxDcrDeviceState, that simplifies it a lot. If you don't
want to make mote changes, let me take your series and make a version with
my proposed changes.
Patch 1-7 are already merged. You can grab the rest here :
Don't drop Ppc4xxDcrDeviceState, that simplifies it a lot.
If you don't want to make mote changes, let me take your series
and make a version with my proposed changes.
Patch 1-7 are already merged. You can grab the rest here :
https://github.com/legoater/qemu/tree/ppc-ref405ep
I have
On Thu, 11 Aug 2022, Cédric Le Goater wrote:
On 8/10/22 16:48, BALATON Zoltan wrote:
On Wed, 10 Aug 2022, Cédric Le Goater wrote:
On 8/10/22 15:28, BALATON Zoltan wrote:
On Wed, 10 Aug 2022, Cédric Le Goater wrote:
On 8/9/22 19:21, BALATON Zoltan wrote:
On Tue, 9 Aug 2022, Cédric Le Goater
On 8/10/22 16:48, BALATON Zoltan wrote:
On Wed, 10 Aug 2022, Cédric Le Goater wrote:
On 8/10/22 15:28, BALATON Zoltan wrote:
On Wed, 10 Aug 2022, Cédric Le Goater wrote:
On 8/9/22 19:21, BALATON Zoltan wrote:
On Tue, 9 Aug 2022, Cédric Le Goater wrote:
The Device Control Registers (DCR) of
On Wed, 10 Aug 2022, Cédric Le Goater wrote:
On 8/10/22 15:28, BALATON Zoltan wrote:
On Wed, 10 Aug 2022, Cédric Le Goater wrote:
On 8/9/22 19:21, BALATON Zoltan wrote:
On Tue, 9 Aug 2022, Cédric Le Goater wrote:
The Device Control Registers (DCR) of on-SoC devices are accessed by
software
On 8/10/22 15:28, BALATON Zoltan wrote:
On Wed, 10 Aug 2022, Cédric Le Goater wrote:
On 8/9/22 19:21, BALATON Zoltan wrote:
On Tue, 9 Aug 2022, Cédric Le Goater wrote:
The Device Control Registers (DCR) of on-SoC devices are accessed by
software through the use of the mtdcr and mfdcr
On Wed, 10 Aug 2022, Cédric Le Goater wrote:
On 8/9/22 19:21, BALATON Zoltan wrote:
On Tue, 9 Aug 2022, Cédric Le Goater wrote:
The Device Control Registers (DCR) of on-SoC devices are accessed by
software through the use of the mtdcr and mfdcr instructions. These
are converted in transactions
On 8/9/22 19:21, BALATON Zoltan wrote:
On Tue, 9 Aug 2022, Cédric Le Goater wrote:
The Device Control Registers (DCR) of on-SoC devices are accessed by
software through the use of the mtdcr and mfdcr instructions. These
are converted in transactions on a side band bus, the DCR bus, which
On Tue, 9 Aug 2022, Cédric Le Goater wrote:
The Device Control Registers (DCR) of on-SoC devices are accessed by
software through the use of the mtdcr and mfdcr instructions. These
are converted in transactions on a side band bus, the DCR bus, which
connects the on-SoC devices to the CPU.
The Device Control Registers (DCR) of on-SoC devices are accessed by
software through the use of the mtdcr and mfdcr instructions. These
are converted in transactions on a side band bus, the DCR bus, which
connects the on-SoC devices to the CPU.
Ideally, we should model these accesses with a DCR
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