On 10/24/22 01:36, tobias.roeh...@rwth-aachen.de wrote:
From: Tobias Röhmel
Typo "implement" in subject.
@@ -8038,6 +8035,11 @@ void register_cp_regs_for_features(ARMCPU *cpu)
.accessfn = access_aa64_tid1,
.type = ARM_CP_CONST, .resetvalue = cpu->revidr },
From: Tobias Röhmel
Cores with PMSA have the MPUIR register which has the
same encoding as the MIDR alias with opc2=4. So we only
add that alias if we are not realizing a core that
implements PMSA.
Signed-off-by: Tobias Röhmel
---
target/arm/helper.c | 14 ++
1 file changed, 10 ins
