Re: [PATCH v4 4/4] target/riscv: add vector configure instruction

2020-02-12 Thread Richard Henderson
On 2/12/20 12:09 AM, LIU Zhiwei wrote: > > > On 2020/2/12 0:56, Richard Henderson wrote: >> On 2/10/20 8:12 AM, LIU Zhiwei wrote: >>>   static inline void cpu_get_tb_cpu_state(CPURISCVState *env, target_ulong >>> *pc, >>> -    target_ulong *cs_base, uint32_t

Re: [PATCH v4 4/4] target/riscv: add vector configure instruction

2020-02-12 Thread LIU Zhiwei
On 2020/2/12 0:56, Richard Henderson wrote: On 2/10/20 8:12 AM, LIU Zhiwei wrote: static inline void cpu_get_tb_cpu_state(CPURISCVState *env, target_ulong *pc, -target_ulong *cs_base, uint32_t *flags) +

Re: [PATCH v4 4/4] target/riscv: add vector configure instruction

2020-02-11 Thread Richard Henderson
On 2/10/20 8:12 AM, LIU Zhiwei wrote: > static inline void cpu_get_tb_cpu_state(CPURISCVState *env, target_ulong *pc, > -target_ulong *cs_base, uint32_t > *flags) > +target_ulong *cs_base, uint32_t > *pflags) > { >

[PATCH v4 4/4] target/riscv: add vector configure instruction

2020-02-10 Thread LIU Zhiwei
vsetvl and vsetvli are two configure instructions for vl, vtype. TB flags should update after configure instructions. The (ill, lmul, sew ) of vtype and the bit of (VSTART == 0 && VL == VLMAX) will be placed within tb_flags. Signed-off-by: LIU Zhiwei --- MAINTAINERS