Re: [PATCH v5 15/17] aspeed/soc: fix incorrect dram size for AST2700

2024-06-03 Thread Cédric Le Goater
On 6/4/24 07:44, Jamin Lin wrote: AST2700 dram size calculation is not back compatible AST2600. According to the DDR capacity hardware behavior, if users write the data to the address which is beyond the ram size, it would write the data to the "address % ram_size". For example: a. sdram base add

[PATCH v5 15/17] aspeed/soc: fix incorrect dram size for AST2700

2024-06-03 Thread Jamin Lin via
AST2700 dram size calculation is not back compatible AST2600. According to the DDR capacity hardware behavior, if users write the data to the address which is beyond the ram size, it would write the data to the "address % ram_size". For example: a. sdram base address "0x4 " b. sdram size 1