Hi Marc,
On 10/20/22 5:44 PM, Marc Zyngier wrote:
On Thu, 20 Oct 2022 00:57:32 +0100,
Gavin Shan wrote:
For Marc's suggestion to add properties so that these high memory
regions can be disabled by users. I can add one patch after this one
to introduce the following 3 properties. Could you ple
On Thu, 20 Oct 2022 00:57:32 +0100,
Gavin Shan wrote:
>
> For Marc's suggestion to add properties so that these high memory
> regions can be disabled by users. I can add one patch after this one
> to introduce the following 3 properties. Could you please confirm
> the property names are good enou
Hi Eric,
On 10/20/22 4:18 AM, Eric Auger wrote:
On 10/12/22 01:18, Gavin Shan wrote:
After the improvement to high memory region address assignment is
applied, the memory layout can be changed, introducing possible
migration breakage. For example, VIRT_HIGH_PCIE_MMIO memory region
is disabled o
Hi Connie,
On 10/19/22 10:00 PM, Cornelia Huck wrote:
On Wed, Oct 12 2022, Gavin Shan wrote:
After the improvement to high memory region address assignment is
applied, the memory layout can be changed, introducing possible
migration breakage. For example, VIRT_HIGH_PCIE_MMIO memory region
is
Hi Gavin,
On 10/12/22 01:18, Gavin Shan wrote:
> After the improvement to high memory region address assignment is
> applied, the memory layout can be changed, introducing possible
> migration breakage. For example, VIRT_HIGH_PCIE_MMIO memory region
> is disabled or enabled when the optimization i
On Wed, Oct 12 2022, Gavin Shan wrote:
> After the improvement to high memory region address assignment is
> applied, the memory layout can be changed, introducing possible
> migration breakage. For example, VIRT_HIGH_PCIE_MMIO memory region
> is disabled or enabled when the optimization is appli
After the improvement to high memory region address assignment is
applied, the memory layout can be changed, introducing possible
migration breakage. For example, VIRT_HIGH_PCIE_MMIO memory region
is disabled or enabled when the optimization is applied or not, with
the following configuration.
p
