Re: [PATCH v6 10/61] target/riscv: vector single-width integer add and subtract

2020-03-28 Thread LIU Zhiwei
On 2020/3/28 7:54, Richard Henderson wrote: On 3/17/20 8:06 AM, LIU Zhiwei wrote: +if (a->vm && s->vl_eq_vlmax) { +gvec_fn(s->sew, vreg_ofs(s, a->rd), +vreg_ofs(s, a->rs2), vreg_ofs(s, a->rs1), +MAXSZ(s), MAXSZ(s)); Indentation is off here. Do you mean I

Re: [PATCH v6 10/61] target/riscv: vector single-width integer add and subtract

2020-03-27 Thread Richard Henderson
On 3/17/20 8:06 AM, LIU Zhiwei wrote: > +if (a->vm && s->vl_eq_vlmax) { > +gvec_fn(s->sew, vreg_ofs(s, a->rd), > +vreg_ofs(s, a->rs2), vreg_ofs(s, a->rs1), > +MAXSZ(s), MAXSZ(s)); Indentation is off here. > +static inline bool > +do_opivx_gvec(DisasContext *s,

Re: [PATCH v6 10/61] target/riscv: vector single-width integer add and subtract

2020-03-20 Thread Alistair Francis
On Tue, Mar 17, 2020 at 8:27 AM LIU Zhiwei wrote: > > Signed-off-by: LIU Zhiwei Reviewed-by: Alistair Francis Alistair > --- > target/riscv/helper.h | 21 ++ > target/riscv/insn32.decode | 10 + > target/riscv/insn_trans/trans_rvv.inc.c | 251

[PATCH v6 10/61] target/riscv: vector single-width integer add and subtract

2020-03-17 Thread LIU Zhiwei
Signed-off-by: LIU Zhiwei --- target/riscv/helper.h | 21 ++ target/riscv/insn32.decode | 10 + target/riscv/insn_trans/trans_rvv.inc.c | 251 target/riscv/vector_helper.c| 149 ++ 4 files changed, 431