Re: [SPAM] [PATCH v6 6/8] aspeed/soc: Correct GPIO irq 130 for AST2700

2024-09-30 Thread Cédric Le Goater
On 9/30/24 10:52, Jamin Lin wrote: The register set of GPIO have a significant change since AST2700. Each GPIO pin has their own individual control register and users are able to set one GPIO pin’s direction, interrupt enable, input mask and so on in the same one control register. AST2700 does n

[PATCH v6 6/8] aspeed/soc: Correct GPIO irq 130 for AST2700

2024-09-30 Thread Jamin Lin via
The register set of GPIO have a significant change since AST2700. Each GPIO pin has their own individual control register and users are able to set one GPIO pin’s direction, interrupt enable, input mask and so on in the same one control register. AST2700 does not have GPIO18_XXX registers for GPIO