On 7/12/24 10:14, Pierrick Bouvier wrote:
On 7/12/24 07:51, Alex Bennée wrote:
Pierrick Bouvier writes:
On 7/8/24 12:15, Alex Bennée wrote:
Pierrick Bouvier writes:
Add an explicit test to check expected memory values are read/written.
For sizes 8, 16, 32, 64 and 128, we generate a load/s
On 7/12/24 07:51, Alex Bennée wrote:
Pierrick Bouvier writes:
On 7/8/24 12:15, Alex Bennée wrote:
Pierrick Bouvier writes:
Add an explicit test to check expected memory values are read/written.
For sizes 8, 16, 32, 64 and 128, we generate a load/store operation.
For size 8 -> 64, we genera
Pierrick Bouvier writes:
> On 7/8/24 12:15, Alex Bennée wrote:
>> Pierrick Bouvier writes:
>>
>>> Add an explicit test to check expected memory values are read/written.
>>> For sizes 8, 16, 32, 64 and 128, we generate a load/store operation.
>>> For size 8 -> 64, we generate an atomic __sync_va
On 7/8/24 12:15, Alex Bennée wrote:
Pierrick Bouvier writes:
Add an explicit test to check expected memory values are read/written.
For sizes 8, 16, 32, 64 and 128, we generate a load/store operation.
For size 8 -> 64, we generate an atomic __sync_val_compare_and_swap too.
For 128bits memory a
On 7/7/24 11:25, Richard Henderson wrote:
On 7/6/24 12:13, Pierrick Bouvier wrote:
+++ b/tests/tcg/x86_64/test-plugin-mem-access.c
@@ -0,0 +1,89 @@
+#include
+#include
All new files should have license boilerplate and description.
You can use spdx to limit to just a couple of lines.
Added
Pierrick Bouvier writes:
> Add an explicit test to check expected memory values are read/written.
> For sizes 8, 16, 32, 64 and 128, we generate a load/store operation.
> For size 8 -> 64, we generate an atomic __sync_val_compare_and_swap too.
> For 128bits memory access, we rely on SSE2 instruct
On 7/6/24 12:13, Pierrick Bouvier wrote:
+++ b/tests/tcg/x86_64/test-plugin-mem-access.c
@@ -0,0 +1,89 @@
+#include
+#include
All new files should have license boilerplate and description.
You can use spdx to limit to just a couple of lines.
r~
Add an explicit test to check expected memory values are read/written.
For sizes 8, 16, 32, 64 and 128, we generate a load/store operation.
For size 8 -> 64, we generate an atomic __sync_val_compare_and_swap too.
For 128bits memory access, we rely on SSE2 instructions.
By default, atomic accesses