Re: [PATCH v8 0/4] riscv: Add support for Zicbo[m,z,p] instructions

On Fri, 24 Feb 2023 05:25:32 PST (-0800), dbarb...@ventanamicro.com wrote: Hi, This version has a change in patch 2, proposed by Weiwei Li, where we're now triggering virt_instruction_fault before triggering illegal_insn fault from S mode. Richard already queued patch 1 is queued in tcg-next

Re: [PATCH v8 0/4] riscv: Add support for Zicbo[m,z,p] instructions

Hi, Thanks everyone for the reviews. Palmer, patch 1 just landed upstream (commit 1770b2f2d3d6). You can pick patches 2-4 cleanly now. There is another patch in the ML: [PATCH v2 0/1] hw/riscv/virt.c: add cbo[mz]-block-size fdt properties​3 messages that can be picked together as well.

[PATCH v8 0/4] riscv: Add support for Zicbo[m,z,p] instructions

Hi, This version has a change in patch 2, proposed by Weiwei Li, where we're now triggering virt_instruction_fault before triggering illegal_insn fault from S mode. Richard already queued patch 1 is queued in tcg-next already. I'm still including it here to allow for easier testing of the