On 9/26/23 23:06, Bui Quang Minh wrote:
Hi everyone,
This series implements x2APIC mode in userspace local APIC and the
RDMSR/WRMSR helper to access x2APIC registers in x2APIC mode. Intel iommu
and AMD iommu are adjusted to support x2APIC interrupt remapping. With this
series, we can now boot Li
On Wed, Oct 04, 2023 at 11:40:43PM +0700, Bui Quang Minh wrote:
> On 10/4/23 13:51, Michael S. Tsirkin wrote:
> > On Tue, Sep 26, 2023 at 11:23:53PM +0700, Bui Quang Minh wrote:
> > > On 9/26/23 23:06, Bui Quang Minh wrote:
> > >
> > > > Version 8 changes,
> > > > - Patch 2, 4:
> > > > + Rebas
On 10/4/23 13:51, Michael S. Tsirkin wrote:
On Tue, Sep 26, 2023 at 11:23:53PM +0700, Bui Quang Minh wrote:
On 9/26/23 23:06, Bui Quang Minh wrote:
Version 8 changes,
- Patch 2, 4:
+ Rebase to master and resolve conflicts in these 2 patches
The conflicts when rebasing is due to the commi
On Tue, Sep 26, 2023 at 11:23:53PM +0700, Bui Quang Minh wrote:
> On 9/26/23 23:06, Bui Quang Minh wrote:
>
> > Version 8 changes,
> > - Patch 2, 4:
> >+ Rebase to master and resolve conflicts in these 2 patches
>
> The conflicts when rebasing is due to the commit 9926cf34de5fa15da
> ("target
On 9/26/23 23:06, Bui Quang Minh wrote:
Version 8 changes,
- Patch 2, 4:
+ Rebase to master and resolve conflicts in these 2 patches
The conflicts when rebasing is due to the commit 9926cf34de5fa15da
("target/i386: Allow elision of kvm_enable_x2apic()"). AFAIK, this
commit adds kvm_enable
Hi everyone,
This series implements x2APIC mode in userspace local APIC and the
RDMSR/WRMSR helper to access x2APIC registers in x2APIC mode. Intel iommu
and AMD iommu are adjusted to support x2APIC interrupt remapping. With this
series, we can now boot Linux kernel into x2APIC mode with TCG accel
