This describes the PL050 device interface implemented within QEMU. Signed-off-by: Mark Cave-Ayland <mark.cave-ayl...@ilande.co.uk> Message-Id: <20220624134109.881989-38-mark.cave-ayl...@ilande.co.uk> Reviewed-by: Peter Maydell <peter.mayd...@linaro.org> --- hw/input/pl050.c | 8 ++++++++ 1 file changed, 8 insertions(+)
diff --git a/hw/input/pl050.c b/hw/input/pl050.c index c665a4fc99..ffaa72dea4 100644 --- a/hw/input/pl050.c +++ b/hw/input/pl050.c @@ -7,6 +7,14 @@ * This code is licensed under the GPL. */ +/* + * QEMU interface: + * + sysbus MMIO region 0: MemoryRegion defining the PL050 registers + * + Named GPIO input "ps2-input-irq": set to 1 if the downstream PS2 device + * has asserted its irq + * + sysbus IRQ 0: PL050 output irq + */ + #include "qemu/osdep.h" #include "hw/sysbus.h" #include "migration/vmstate.h" -- 2.30.2
