From: Richard Henderson <richard.hender...@linaro.org>
In get_physical_address, we should use the setting passed
via mmu_idx rather than checking env->mstatus directly.
Signed-off-by: Richard Henderson <richard.hender...@linaro.org>
Reviewed-by: Alistair Francis <alistair.fran...@wdc.com>
Reviewed-by: Weiwei Li <liwei...@iscas.ac.cn>
Tested-by: Daniel Henrique Barboza <dbarb...@ventanamicro.com>
Message-Id: <20230325105429.1142530-13-richard.hender...@linaro.org>
Message-Id: <20230412114333.118895-13-richard.hender...@linaro.org>
Signed-off-by: Alistair Francis <alistair.fran...@wdc.com>
---
target/riscv/internals.h | 5 +++++
target/riscv/cpu_helper.c | 2 +-
2 files changed, 6 insertions(+), 1 deletion(-)
diff --git a/target/riscv/internals.h b/target/riscv/internals.h
index 7b63c0f1b6..0b61f337dd 100644
--- a/target/riscv/internals.h
+++ b/target/riscv/internals.h
@@ -37,6 +37,11 @@
#define MMUIdx_M 3
#define MMU_2STAGE_BIT (1 << 2)
+static inline bool mmuidx_sum(int mmu_idx)
+{
+ return (mmu_idx & 3) == MMUIdx_S_SUM;
+}
+
/* share data between vector helpers and decode code */
FIELD(VDATA, VM, 0, 1)
FIELD(VDATA, LMUL, 1, 3)
diff --git a/target/riscv/cpu_helper.c b/target/riscv/cpu_helper.c
index 291a1acbf7..29ee9b1b42 100644
--- a/target/riscv/cpu_helper.c
+++ b/target/riscv/cpu_helper.c
@@ -842,7 +842,7 @@ static int get_physical_address(CPURISCVState *env, hwaddr
*physical,
widened = 2;
}
/* status.SUM will be ignored if execute on background */
- sum = get_field(env->mstatus, MSTATUS_SUM) || use_background || is_debug;
+ sum = mmuidx_sum(mmu_idx) || use_background || is_debug;
switch (vm) {
case VM_1_10_SV32:
levels = 2; ptidxbits = 10; ptesize = 4; break;
--
2.40.0
