On 10/1/24 7:24 PM, Tomasz Jeznach wrote:
On Tue, Sep 24, 2024 at 3:18 PM Alistair Francis wrote:
+
+/* IOMMU index for transactions without process_id specified. */
+#define RISCV_IOMMU_NOPROCID 0
+
+static uint8_t riscv_iommu_get_icvec_vector(uint32_t icvec, uint32_t vec_type)
+{
+swi
On Tue, Oct 1, 2024 at 4:00 PM Daniel Henrique Barboza
wrote:
>
>
>
> On 10/1/24 7:14 PM, Tomasz Jeznach wrote:
> > On Sun, Sep 29, 2024 at 8:46 AM Peter Maydell
> > wrote:
> >>
> >> On Sat, 28 Sept 2024 at 22:01, Daniel Henrique Barboza
> >> wrote:
> >>>
> >>>
> >>>
> >>> On 9/28/24 5:22 PM, P
On 10/1/24 7:14 PM, Tomasz Jeznach wrote:
On Sun, Sep 29, 2024 at 8:46 AM Peter Maydell wrote:
On Sat, 28 Sept 2024 at 22:01, Daniel Henrique Barboza
wrote:
On 9/28/24 5:22 PM, Peter Maydell wrote:
On Tue, 24 Sept 2024 at 23:19, Alistair Francis wrote:
+/* Register helper function
On Tue, Sep 24, 2024 at 3:18 PM Alistair Francis wrote:
> +
> +/* IOMMU index for transactions without process_id specified. */
> +#define RISCV_IOMMU_NOPROCID 0
> +
> +static uint8_t riscv_iommu_get_icvec_vector(uint32_t icvec, uint32_t
> vec_type)
> +{
> +switch (vec_type) {
> +case RI
On Sun, Sep 29, 2024 at 8:46 AM Peter Maydell wrote:
>
> On Sat, 28 Sept 2024 at 22:01, Daniel Henrique Barboza
> wrote:
> >
> >
> >
> > On 9/28/24 5:22 PM, Peter Maydell wrote:
> > > On Tue, 24 Sept 2024 at 23:19, Alistair Francis
> > > wrote:
>
> > >> +/* Register helper functions */
> > >> +
On Sat, 28 Sept 2024 at 22:01, Daniel Henrique Barboza
wrote:
>
>
>
> On 9/28/24 5:22 PM, Peter Maydell wrote:
> > On Tue, 24 Sept 2024 at 23:19, Alistair Francis
> > wrote:
> >> +/* Register helper functions */
> >> +static inline uint32_t riscv_iommu_reg_mod32(RISCVIOMMUState *s,
> >> +un
On 9/28/24 5:22 PM, Peter Maydell wrote:
On Tue, 24 Sept 2024 at 23:19, Alistair Francis wrote:
From: Tomasz Jeznach
The RISC-V IOMMU specification is now ratified as-per the RISC-V
international process. The latest frozen specifcation can be found at:
https://github.com/riscv-non-isa/ri
On Tue, 24 Sept 2024 at 23:19, Alistair Francis wrote:
>
> From: Tomasz Jeznach
>
> The RISC-V IOMMU specification is now ratified as-per the RISC-V
> international process. The latest frozen specifcation can be found at:
>
> https://github.com/riscv-non-isa/riscv-iommu/releases/download/v1.0/ris
From: Tomasz Jeznach
The RISC-V IOMMU specification is now ratified as-per the RISC-V
international process. The latest frozen specifcation can be found at:
https://github.com/riscv-non-isa/riscv-iommu/releases/download/v1.0/riscv-iommu.pdf
Add the foundation of the device emulation for RISC-V
