From: Bernhard Beschow <shen...@gmail.com>
The Malta board, which is the only user of PIIX4, doesn't connect to the
exported interrupt lines. PIIX3 doesn't expose such interrupt lines
either, so remove them for PIIX4 for simplicity and consistency.
Signed-off-by: Bernhard Beschow <shen...@gmail.com>
Reviewed-by: Michael S. Tsirkin <m...@redhat.com>
Message-Id: <20231007123843.127151-16-shen...@gmail.com>
Signed-off-by: Michael S. Tsirkin <m...@redhat.com>
---
hw/isa/piix4.c | 8 --------
1 file changed, 8 deletions(-)
diff --git a/hw/isa/piix4.c b/hw/isa/piix4.c
index e0b149f8eb..3c3c7a094c 100644
--- a/hw/isa/piix4.c
+++ b/hw/isa/piix4.c
@@ -148,12 +148,6 @@ static void piix4_request_i8259_irq(void *opaque, int irq,
int level)
qemu_set_irq(s->cpu_intr, level);
}
-static void piix4_set_i8259_irq(void *opaque, int irq, int level)
-{
- PIIX4State *s = opaque;
- qemu_set_irq(s->isa[irq], level);
-}
-
static void piix4_rcr_write(void *opaque, hwaddr addr, uint64_t val,
unsigned int len)
{
@@ -197,8 +191,6 @@ static void piix4_realize(PCIDevice *dev, Error **errp)
return;
}
- qdev_init_gpio_in_named(DEVICE(dev), piix4_set_i8259_irq,
- "isa", ISA_NUM_IRQS);
qdev_init_gpio_out_named(DEVICE(dev), &s->cpu_intr,
"intr", 1);
--
MST
