Re: [Qemu-devel] [Bug][Patch] Cirrus-VGA for Malta

2007-09-25 Thread Derek Fawcus
On Mon, Sep 24, 2007 at 11:22:30PM +0200, Fabrice Bellard wrote: > I realize that the other pixel formats are buggy too, so at least your > patch is consistent with what is already coded ! > > I guess the problem is in the VGA memory handlers. Otherwise it means > that there is a (Cirrus)VGA con

Re: [Qemu-devel] [Bug][Patch] Cirrus-VGA for Malta

2007-09-24 Thread Fabrice Bellard
I realize that the other pixel formats are buggy too, so at least your patch is consistent with what is already coded ! I guess the problem is in the VGA memory handlers. Otherwise it means that there is a (Cirrus)VGA configuration register to change the endianness of the frame buffer. In such

Re: [Qemu-devel] [Bug][Patch] Cirrus-VGA for Malta

2007-09-24 Thread Fabrice Bellard
The problem must come from somewhere else. VGA (as any other device) must not depend on the target CPU endianness (note that the endianness tests in the memory handlers are only necessary because the bus API is still incomplete). Regards, Fabrice. Stefan Weil wrote: Hello, here is a patch

[Qemu-devel] [Bug][Patch] Cirrus-VGA for Malta

2007-09-24 Thread Stefan Weil
Hello, here is a patch which makes VGA usable for Malta MIPS32 in big endian mode. I don't know whether other big endian emulations need a patch for VGA, too. Regards Stefan Index: hw/vga_template.h === RCS file: /sources/qemu/qemu