** Changed in: qemu
Status: New = Fix Released
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https://bugs.launchpad.net/bugs/944645
Title:
ARM: CORTEX M, ICI/IT bits in XPSR were not cleared then entering
exception
Yes, this is a bug: the code which tries to clear the IT bits is doing
it via env-uncached_cpsr = ~CPSR_IT; but the IT bits are cached
elsewhere. I'll send out a patch later today.
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Changes where made in
static void do_interrupt_v7m(CPUARMState *env)
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https://bugs.launchpad.net/bugs/944645
Title:
ARM: CORTEX M, ICI/IT bits in XPSR were not cleared then entering
Patch submitted: http://patchwork.ozlabs.org/patch/144218/
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devel-ml, which is subscribed to QEMU.
https://bugs.launchpad.net/bugs/944645
Title:
ARM: CORTEX M, ICI/IT bits in XPSR were not cleared then entering
exception
