On 01/07/2011 18:00, Scott Wood wrote:
> On Fri, 1 Jul 2011 17:39:49 +0200
> Fabien Chouteau wrote:
>
>> No, I just implemented these no-oped instructions to get rid of an illegal
>> instruction exception while running u-boot on my emulated p2010.
>>
>
> Heh, so someone *is* trying to run firmwa
On Fri, 1 Jul 2011 17:39:49 +0200
Fabien Chouteau wrote:
> No, I just implemented these no-oped instructions to get rid of an illegal
> instruction exception while running u-boot on my emulated p2010.
>
Heh, so someone *is* trying to run firmware. :-)
It would take a lot of low-level hardware
On 01/07/2011 17:05, Alexander Graf wrote:
>
> On 01.07.2011, at 16:59, Fabien Chouteau wrote:
>
>> On 01/07/2011 00:38, Alexander Graf wrote:
>>>
>>> On 01.07.2011, at 00:32, Scott Wood wrote:
>>>
On Fri, 1 Jul 2011 00:28:19 +0200
Alexander Graf wrote:
>
> On 01.07.2011, at
On 01/07/2011 00:38, Alexander Graf wrote:
>
> On 01.07.2011, at 00:32, Scott Wood wrote:
>
>> On Fri, 1 Jul 2011 00:28:19 +0200
>> Alexander Graf wrote:
>>
>>>
>>> On 01.07.2011, at 00:23, Scott Wood wrote:
>>>
On Fri, 1 Jul 2011 00:18:22 +0200
Alexander Graf wrote:
>
>
On 01.07.2011, at 16:59, Fabien Chouteau wrote:
> On 01/07/2011 00:38, Alexander Graf wrote:
>>
>> On 01.07.2011, at 00:32, Scott Wood wrote:
>>
>>> On Fri, 1 Jul 2011 00:28:19 +0200
>>> Alexander Graf wrote:
>>>
On 01.07.2011, at 00:23, Scott Wood wrote:
> On Fri, 1 Jul
On 01.07.2011, at 00:23, Scott Wood wrote:
> On Fri, 1 Jul 2011 00:18:22 +0200
> Alexander Graf wrote:
>
>>
>> On 01.07.2011, at 00:11, Scott Wood wrote:
>>
>>> Almost, but what if we have write permission but not read?
>>
>> How would you write back data from a cache line when you haven't r
On Fri, 1 Jul 2011 00:18:22 +0200
Alexander Graf wrote:
>
> On 01.07.2011, at 00:11, Scott Wood wrote:
>
> > Almost, but what if we have write permission but not read?
>
> How would you write back data from a cache line when you haven't read it
> earlier?
The CPU can read it. The program ca
On Fri, 1 Jul 2011 00:28:19 +0200
Alexander Graf wrote:
>
> On 01.07.2011, at 00:23, Scott Wood wrote:
>
> > On Fri, 1 Jul 2011 00:18:22 +0200
> > Alexander Graf wrote:
> >
> >>
> >> On 01.07.2011, at 00:11, Scott Wood wrote:
> >>
> >>> Almost, but what if we have write permission but not r
On 01.07.2011, at 00:32, Scott Wood wrote:
> On Fri, 1 Jul 2011 00:28:19 +0200
> Alexander Graf wrote:
>
>>
>> On 01.07.2011, at 00:23, Scott Wood wrote:
>>
>>> On Fri, 1 Jul 2011 00:18:22 +0200
>>> Alexander Graf wrote:
>>>
On 01.07.2011, at 00:11, Scott Wood wrote:
>
On 01.07.2011, at 00:11, Scott Wood wrote:
> On Thu, 30 Jun 2011 23:56:17 +0200
> Alexander Graf wrote:
>
>>
>> On 30.06.2011, at 23:46, Scott Wood wrote:
>>
>>> On Thu, 30 Jun 2011 23:34:37 +0200
>>> Alexander Graf wrote:
>>>
We could just keep an internal counter that memorizes how m
On Thu, 30 Jun 2011 23:56:17 +0200
Alexander Graf wrote:
>
> On 30.06.2011, at 23:46, Scott Wood wrote:
>
> > On Thu, 30 Jun 2011 23:34:37 +0200
> > Alexander Graf wrote:
> >
> >> We could just keep an internal counter that memorizes how much memory is
> >> locked and sets the bit after exce
On Thu, 30 Jun 2011 23:34:37 +0200
Alexander Graf wrote:
> We could just keep an internal counter that memorizes how much memory is
> locked and sets the bit after exceeding the fake cache size.
And keep track of unlocks, decrementing the counter only if the address was
already locked... seems
On 30.06.2011, at 23:46, Scott Wood wrote:
> On Thu, 30 Jun 2011 23:34:37 +0200
> Alexander Graf wrote:
>
>> We could just keep an internal counter that memorizes how much memory is
>> locked and sets the bit after exceeding the fake cache size.
>
> And keep track of unlocks, decrementing the
On 30.06.2011, at 18:17, Scott Wood wrote:
> On Thu, 30 Jun 2011 10:25:31 +0200
> Fabien Chouteau wrote:
>
>> On 28/06/2011 18:20, Scott Wood wrote:
>>> On Tue, 28 Jun 2011 10:17:39 +0200
>>> Fabien Chouteau wrote:
>>>
Why do you want to set this bit? Can't we consider that the instructi
On Thu, 30 Jun 2011 10:25:31 +0200
Fabien Chouteau wrote:
> On 28/06/2011 18:20, Scott Wood wrote:
> > On Tue, 28 Jun 2011 10:17:39 +0200
> > Fabien Chouteau wrote:
> >
> >> Why do you want to set this bit? Can't we consider that the instruction is
> >> always effective?
> >
> > But it's not.
On 28/06/2011 18:20, Scott Wood wrote:
> On Tue, 28 Jun 2011 10:17:39 +0200
> Fabien Chouteau wrote:
>
>> On 27/06/2011 18:28, Scott Wood wrote:
>>> On Mon, 27 Jun 2011 15:15:55 +0200
>>> Fabien Chouteau wrote:
>>>
+/* dcbtls */
+static void gen_dcbtls(DisasContext *ctx)
+{
+
On Tue, 28 Jun 2011 10:17:39 +0200
Fabien Chouteau wrote:
> On 27/06/2011 18:28, Scott Wood wrote:
> > On Mon, 27 Jun 2011 15:15:55 +0200
> > Fabien Chouteau wrote:
> >
> >> +/* dcbtls */
> >> +static void gen_dcbtls(DisasContext *ctx)
> >> +{
> >> +/* interpreted as no-op */
> >> +}
> >> +
On 27/06/2011 18:28, Scott Wood wrote:
> On Mon, 27 Jun 2011 15:15:55 +0200
> Fabien Chouteau wrote:
>
>> +/* dcbtls */
>> +static void gen_dcbtls(DisasContext *ctx)
>> +{
>> +/* interpreted as no-op */
>> +}
>> +
>> +/* dcbtstls */
>> +static void gen_dcbtstls(DisasContext *ctx)
>> +{
>> +
On Mon, 27 Jun 2011 15:15:55 +0200
Fabien Chouteau wrote:
> +/* dcbtls */
> +static void gen_dcbtls(DisasContext *ctx)
> +{
> +/* interpreted as no-op */
> +}
> +
> +/* dcbtstls */
> +static void gen_dcbtstls(DisasContext *ctx)
> +{
> +/* interpreted as no-op */
> +}
Set L1CSR0[CUL] (una
Signed-off-by: Fabien Chouteau
---
target-ppc/translate.c | 21 +
1 files changed, 21 insertions(+), 0 deletions(-)
diff --git a/target-ppc/translate.c b/target-ppc/translate.c
index 0a03b44..d0ca821 100644
--- a/target-ppc/translate.c
+++ b/target-ppc/translate.c
@@ -3995
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