Hi,
this patch corrects two problems for the OpenRISC Target in QEMU. The
first one corrects one obvious bug
concerning the handling of page faults while reading from a page. The
second part removes a non-conforming behavior for the first page of the
memory.
I have tested this patch with the newest Linux kernel and compared the
output with or1ksim.
Sebastian
>From 4491bae7109e2b4de5a8de8a7e4b08d1f19ac70e Mon Sep 17 00:00:00 2001
From: Sebastian Macke <sebast...@macke.de>
Date: Tue, 1 Oct 2013 21:39:38 -0700
Subject: [PATCH] Correction of the TLB handling of the OpenRISC target
This patch correct two problems. The first one corrects one obvious bug
concerning the handling of page faults while reading from a page.
The second part removes a non-conforming behavior for the first page of
the memory.
I have tested this patch with the newest Linux kernel and compared the
output with or1ksim.
Signed-off-by: Sebastian Macke <sebast...@macke.de>
---
target-openrisc/mmu.c | 9 +--------
1 files changed, 1 insertions(+), 8 deletions(-)
diff --git a/target-openrisc/mmu.c b/target-openrisc/mmu.c
index 57f5616..22d7cbe 100644
--- a/target-openrisc/mmu.c
+++ b/target-openrisc/mmu.c
@@ -102,7 +102,7 @@ int cpu_openrisc_get_phys_data(OpenRISCCPU *cpu,
}
}
- if ((rw & 0) && ((right & PAGE_READ) == 0)) {
+ if (!(rw & 1) && ((right & PAGE_READ) == 0)) {
return TLBRET_BADADDR;
}
if ((rw & 1) && ((right & PAGE_WRITE) == 0)) {
@@ -122,13 +122,6 @@ static int cpu_openrisc_get_phys_addr(OpenRISCCPU *cpu,
{
int ret = TLBRET_MATCH;
- /* [0x0000--0x2000]: unmapped */
- if (address < 0x2000 && (cpu->env.sr & SR_SM)) {
- *physical = address;
- *prot = PAGE_READ | PAGE_WRITE;
- return ret;
- }
-
if (rw == 2) { /* ITLB */
*physical = 0;
ret = cpu->env.tlb->cpu_openrisc_map_address_code(cpu, physical,
--
1.7.9