Hi,

Parallel port control register should always have the 0xc0 bits enabled (like this is already done in Qemu parallel port hardware emulation).

Status register should also start with EPP timeout bit set, like on real hardware.

Attached patch fixes both issues.

Hervé
Index: parallel.c
===================================================================
RCS file: /sources/qemu/qemu/hw/parallel.c,v
retrieving revision 1.12
diff -u -r1.12 parallel.c
--- parallel.c  18 Nov 2007 01:44:37 -0000      1.12
+++ parallel.c  6 Feb 2008 11:08:01 -0000
@@ -101,6 +101,7 @@
         parallel_update_irq(s);
         break;
     case PARA_REG_CTR:
+        val |= 0xc0;
         if ((val & PARA_CTR_INIT) == 0 ) {
             s->status = PARA_STS_BUSY;
             s->status |= PARA_STS_ACK;
@@ -414,8 +415,10 @@
     s->status |= PARA_STS_ACK;
     s->status |= PARA_STS_ONLINE;
     s->status |= PARA_STS_ERROR;
+    s->status |= PARA_STS_TMOUT;
     s->control = PARA_CTR_SELECT;
     s->control |= PARA_CTR_INIT;
+    s->control |= 0xc0;
     s->irq = irq;
     s->irq_pending = 0;
     s->chr = chr;

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