Dirk Behme wrote:
> Thiemo Seufer wrote:
> ...
> >I recommend to go for a sufficiently flexible interface first, and then
> >introduce it gradually in all appropriate places. A macro like:
> >
> >MIPS_OPC(ISA, ASE, CPU)
> >
> >which compares the arguments with the currently selected CPU emulation
>
Thiemo Seufer wrote:
...
I recommend to go for a sufficiently flexible interface first, and then
introduce it gradually in all appropriate places. A macro like:
MIPS_OPC(ISA, ASE, CPU)
which compares the arguments with the currently selected CPU emulation
and throws an RI exception if the featu
Fabrice Bellard wrote:
Dirk Behme wrote:
Fabrice Bellard wrote:
Each machine can add specific support for that (for example a -cpu
option). It is likely to come at least for the PC machines.
I add suggest one more parameter to cpu_mips_set_model() to specify
optional features. A function c
Stefan Weil wrote:
> Hi all,
>
> just for information about current projects for QEMU MIPS:
>
> my machine is AR7 which includes a MIPS 4KEc core.
> This core supports the MIPS32R2 architecture and has no FPU.
>
> As far as I know the MIPS architecture, most CPU features
> can be read from well
Hi all,
just for information about current projects for QEMU MIPS:
my machine is AR7 which includes a MIPS 4KEc core.
This core supports the MIPS32R2 architecture and has no FPU.
As far as I know the MIPS architecture, most CPU features
can be read from well defined bits and bytes in the CP0 re
Dirk Behme wrote:
> Thiemo Seufer wrote:
> >Dirk Behme wrote:
> >>- As I understand it, MIPS III is an extension of MIPS II,
> >>MIPS IV is an extension of MIPS III etc. Therefore I used
> >>definitions for ISAx which include the smaller ones as well.
> >
> >Unfortunately it is not that simple. We
Dirk Behme wrote:
Fabrice Bellard wrote:
Each machine can add specific support for that (for example a -cpu
option). It is likely to come at least for the PC machines.
...
I add suggest one more parameter to cpu_mips_set_model() to specify
optional features. A function converting a CPU "str
Fabrice Bellard wrote:
Each machine can add specific support for that (for example a -cpu
option). It is likely to come at least for the PC machines.
...
I add suggest one more parameter to cpu_mips_set_model() to specify
optional features. A function converting a CPU "string id" into an id +
Thiemo Seufer wrote:
Dirk Behme wrote:
- As I understand it, MIPS III is an extension of MIPS II,
MIPS IV is an extension of MIPS III etc. Therefore I used
definitions for ISAx which include the smaller ones as well.
Unfortunately it is not that simple. We have the upward-compatible ISAs:
Mm
Fabrice Bellard wrote:
[snip]
> >>>There is no good reason to make
> >>>the selection at compile time because the translator can efficiently
> >>>handle any CPU differences at runtime.
> >
> >
> >I'm a bit dubious about this argument, each instruction needs to be
> >checked agains a tuple of valu
Thiemo Seufer wrote:
Dirk Behme wrote:
Fabrice Bellard wrote:
You should add a runtime selection system : see the ARM and PowerPC
targets (I would prefer a parameter to cpu_init(). It was not done that
way on PowerPC for legacy reasons). Each machine should be able to
select the processor i
Dirk Behme wrote:
> Fabrice Bellard wrote:
> >You should add a runtime selection system : see the ARM and PowerPC
> >targets (I would prefer a parameter to cpu_init(). It was not done that
> >way on PowerPC for legacy reasons). Each machine should be able to
> >select the processor it needs (and
Fabrice Bellard wrote:
You should add a runtime selection system : see the ARM and PowerPC
targets (I would prefer a parameter to cpu_init(). It was not done that
way on PowerPC for legacy reasons). Each machine should be able to
select the processor it needs (and allow the user to change it if
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