Re: [Qemu-devel] [PATCH] RISC-V: Correct typo in RV32 perf counters

2018-07-30 Thread Peter Maydell
On 30 July 2018 at 12:42, Michael Clark wrote: > > > On Mon, 30 Jul 2018 at 10:46 PM, Peter Maydell > wrote: >> >> On 25 May 2018 at 14:17, Richard Henderson wrote: >> > On 05/24/2018 11:24 PM, Michael Clark wrote: >> >> This patch enables mhpmcounter3h through mhpmcounter31h on RV32. >> >> Prev

Re: [Qemu-devel] [PATCH] RISC-V: Correct typo in RV32 perf counters

2018-07-30 Thread Michael Clark
On Mon, 30 Jul 2018 at 10:46 PM, Peter Maydell wrote: > On 25 May 2018 at 14:17, Richard Henderson wrote: > > On 05/24/2018 11:24 PM, Michael Clark wrote: > >> This patch enables mhpmcounter3h through mhpmcounter31h on RV32. > >> Previously the RV32 h versions (high 32-bits of 64-bit counters) >

Re: [Qemu-devel] [PATCH] RISC-V: Correct typo in RV32 perf counters

2018-07-30 Thread Peter Maydell
On 25 May 2018 at 14:17, Richard Henderson wrote: > On 05/24/2018 11:24 PM, Michael Clark wrote: >> This patch enables mhpmcounter3h through mhpmcounter31h on RV32. >> Previously the RV32 h versions (high 32-bits of 64-bit counters) >> of these counters would trap with an illegal instruction inste

Re: [Qemu-devel] [PATCH] RISC-V: Correct typo in RV32 perf counters

2018-05-25 Thread Richard Henderson
On 05/24/2018 11:24 PM, Michael Clark wrote: > This patch enables mhpmcounter3h through mhpmcounter31h on RV32. > Previously the RV32 h versions (high 32-bits of 64-bit counters) > of these counters would trap with an illegal instruction instead > of returning 0 as intended. > > Reported-by: Richa

[Qemu-devel] [PATCH] RISC-V: Correct typo in RV32 perf counters

2018-05-24 Thread Michael Clark
This patch enables mhpmcounter3h through mhpmcounter31h on RV32. Previously the RV32 h versions (high 32-bits of 64-bit counters) of these counters would trap with an illegal instruction instead of returning 0 as intended. Reported-by: Richard Henderson Signed-off-by: Michael Clark --- target/r