Thanks, applied.
On Wed, Jul 6, 2011 at 2:15 PM, Peter Maydell peter.mayd...@linaro.org wrote:
Ping?
On 22 June 2011 15:16, Peter Maydell peter.mayd...@linaro.org wrote:
The target-arm frontend's worst-case TCG ops per instr is 194 (and in
general many of the load multiple registers ARM
Ping?
On 22 June 2011 15:16, Peter Maydell peter.mayd...@linaro.org wrote:
The target-arm frontend's worst-case TCG ops per instr is 194 (and in
general many of the load multiple registers ARM instructions generate
more than 100 TCG ops). Raise MAX_OP_PER_INSTR accordingly to avoid
possible
The target-arm frontend's worst-case TCG ops per instr is 194 (and in
general many of the load multiple registers ARM instructions generate
more than 100 TCG ops). Raise MAX_OP_PER_INSTR accordingly to avoid
possible buffer overruns.
Since it doesn't make any sense for the 64 bit guest on 32 bit